Fault Tolerant Computer Architecture
For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry.

Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future

1015377396
Fault Tolerant Computer Architecture
For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry.

Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future

40.0 Out Of Stock
Fault Tolerant Computer Architecture

Fault Tolerant Computer Architecture

Fault Tolerant Computer Architecture

Fault Tolerant Computer Architecture

Paperback

$40.00 
  • SHIP THIS ITEM
    Temporarily Out of Stock Online
  • PICK UP IN STORE

    Your local store may have stock of this item.

Related collections and offers


Overview

For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry.

Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future


Product Details

ISBN-13: 9781598299533
Publisher: Morgan and Claypool Publishers
Publication date: 07/06/2009
Series: Synthesis Lectures on Computer Architecture Series
Pages: 116
Product dimensions: 7.50(w) x 9.25(h) x 0.24(d)
From the B&N Reads Blog

Customer Reviews